ACPI (Advanced Configuration and Power Interface) is an open industry specification that defines a flexible and extensible interface for computer power management and related control operations. In general, the interface enables and supports power management through improved hardware and operating system coordination. ACPI allows the operating system to control the power states of many ACPI-supported hardware components, and/or to pass information to and from some hardware components.
The ACPI Specification describes how a system vendor can use General Purpose Events (GPEs) to inform the operating system that some event occurred, such as a laptop lid being closed or a thermal alert. Typically, a hardware device issues a notification to a hardware register, which in turn surfaces the GPE event. The hardware register is represented to the operating system by a software object commonly called a “GPE block.” A GPE block is a logical construct that represents a set of GPE pins on the hardware register. The hardware signals that are connected to those pins are arbitrary in nature (within some guidelines outlined by the ACPI specification). The operating system sees the GPE block as containing two register sets: one to control whether or not a particular pin is enabled, and another to determine if a particular pin is asserted. If the operating system detects that a pin is both enabled and asserted, then it runs an ACPI control method associated with the pin to handle the event. Until now, an ACPI-compliant system supported only a single GPE block. Moreover, the one supported GPE block had a fixed location in I/O space, which is a limited resource in most modern computing systems.
More specifically, the ACPI 1.0 specification provides that 0, 1, or 2 GPE hardware registers can be present in the system, with each GPE hardware register having a different I/O base address. Most operating system developers treat those GPE hardware registers as one “logical” device (the GPE block). The hardware registers that form a GPE block (in ACPI Version 1.0 parlance) share the same address space. That is, if Pin XX is defined for use by GPE0 (the 1st GPE hardware register in the ACPI 1.0 specification), then that same Pin XX cannot be used by GPE1 (the 2nd GPE hardware register in the ACPI 1.0 specification). For these reasons, operating system and computing system developers have been limited to a single logical GPE block, or two GPE hardware registers.
As modern computing systems become more complex, the limitation of one GPE block has proved to be a nuisance to the design and creation of larger computing systems having physically separated hardware components. In short, if a system vendor builds a large computer by connecting four smaller computers, and where each smaller computer has its own GPE block device, then complicated wiring would be required to represent the large computer within the ACPI namespace having only a single GPE block device. For instance, the system vendor may have run the signals from the GPE block devices in each of the smaller computers together to give the illusion that there was a single GPE block device within the large computer. The problems with that solution include that the address space defined by a GPE Block device is finite. A GPE Block can support from 0 to 256 signals. So, for a truly large computer which might have more than 256 signals, it would probably not be possible to wire up all the signals to appear to come from a single GPE block. Sharing signals is possible in some instances but impossible in others and would introduce yet more expensive circuitry to the system. Thus, until now, there has been no way to include multiple GPE block devices in a single computing system.